2 * Copyright (c) 2017 Thomas Pornin <pornin@bolet.org>
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sublicense, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
28 * This code contains the AES key schedule implementation using the
35 #if BR_AES_X86NI_GCC_OLD
36 #pragma GCC push_options
37 #pragma GCC target("sse2,sse4.1,aes,pclmul")
39 #include <wmmintrin.h>
41 #if BR_AES_X86NI_GCC_OLD
42 #pragma GCC pop_options
52 br_aes_x86ni_supported(void)
55 * Bit mask for features in ECX:
56 * 19 SSE4.1 (used for _mm_insert_epi32(), for AES-CTR)
59 #define MASK 0x02080000
62 unsigned eax
, ebx
, ecx
, edx
;
64 if (__get_cpuid(1, &eax
, &ebx
, &ecx
, &edx
)) {
65 return (ecx
& MASK
) == MASK
;
69 #elif BR_AES_X86NI_MSC
73 return ((uint32_t)info
[2] & MASK
) == MASK
;
82 * Per-function attributes appear unreliable on old GCC, so we use the
83 * pragma for all remaining functions in this file.
85 #if BR_AES_X86NI_GCC_OLD
86 #pragma GCC target("sse2,sse4.1,aes,pclmul")
91 expand_step128(__m128i k
, __m128i k2
)
93 k
= _mm_xor_si128(k
, _mm_slli_si128(k
, 4));
94 k
= _mm_xor_si128(k
, _mm_slli_si128(k
, 4));
95 k
= _mm_xor_si128(k
, _mm_slli_si128(k
, 4));
96 k2
= _mm_shuffle_epi32(k2
, 0xFF);
97 return _mm_xor_si128(k
, k2
);
100 BR_TARGET("sse2,aes")
102 expand_step192(__m128i
*t1
, __m128i
*t2
, __m128i
*t3
)
106 *t2
= _mm_shuffle_epi32(*t2
, 0x55);
107 t4
= _mm_slli_si128(*t1
, 0x4);
108 *t1
= _mm_xor_si128(*t1
, t4
);
109 t4
= _mm_slli_si128(t4
, 0x4);
110 *t1
= _mm_xor_si128(*t1
, t4
);
111 t4
= _mm_slli_si128(t4
, 0x4);
112 *t1
= _mm_xor_si128(*t1
, t4
);
113 *t1
= _mm_xor_si128(*t1
, *t2
);
114 *t2
= _mm_shuffle_epi32(*t1
, 0xFF);
115 t4
= _mm_slli_si128(*t3
, 0x4);
116 *t3
= _mm_xor_si128(*t3
, t4
);
117 *t3
= _mm_xor_si128(*t3
, *t2
);
120 BR_TARGET("sse2,aes")
122 expand_step256_1(__m128i
*t1
, __m128i
*t2
)
126 *t2
= _mm_shuffle_epi32(*t2
, 0xFF);
127 t4
= _mm_slli_si128(*t1
, 0x4);
128 *t1
= _mm_xor_si128(*t1
, t4
);
129 t4
= _mm_slli_si128(t4
, 0x4);
130 *t1
= _mm_xor_si128(*t1
, t4
);
131 t4
= _mm_slli_si128(t4
, 0x4);
132 *t1
= _mm_xor_si128(*t1
, t4
);
133 *t1
= _mm_xor_si128(*t1
, *t2
);
136 BR_TARGET("sse2,aes")
138 expand_step256_2(__m128i
*t1
, __m128i
*t3
)
142 t4
= _mm_aeskeygenassist_si128(*t1
, 0x0);
143 t2
= _mm_shuffle_epi32(t4
, 0xAA);
144 t4
= _mm_slli_si128(*t3
, 0x4);
145 *t3
= _mm_xor_si128(*t3
, t4
);
146 t4
= _mm_slli_si128(t4
, 0x4);
147 *t3
= _mm_xor_si128(*t3
, t4
);
148 t4
= _mm_slli_si128(t4
, 0x4);
149 *t3
= _mm_xor_si128(*t3
, t4
);
150 *t3
= _mm_xor_si128(*t3
, t2
);
154 * Perform key schedule for AES, encryption direction. Subkeys are written
155 * in sk[], and the number of rounds is returned. Key length MUST be 16,
158 BR_TARGET("sse2,aes")
160 x86ni_keysched(__m128i
*sk
, const void *key
, size_t len
)
162 const unsigned char *kb
;
164 #define KEXP128(k, i, rcon) do { \
165 k = expand_step128(k, _mm_aeskeygenassist_si128(k, rcon)); \
169 #define KEXP192(i, rcon1, rcon2) do { \
172 t2 = _mm_aeskeygenassist_si128(t3, rcon1); \
173 expand_step192(&t1, &t2, &t3); \
174 sk[(i) + 1] = _mm_castpd_si128(_mm_shuffle_pd( \
175 _mm_castsi128_pd(sk[(i) + 1]), \
176 _mm_castsi128_pd(t1), 0)); \
177 sk[(i) + 2] = _mm_castpd_si128(_mm_shuffle_pd( \
178 _mm_castsi128_pd(t1), \
179 _mm_castsi128_pd(t3), 1)); \
180 t2 = _mm_aeskeygenassist_si128(t3, rcon2); \
181 expand_step192(&t1, &t2, &t3); \
184 #define KEXP256(i, rcon) do { \
186 t2 = _mm_aeskeygenassist_si128(t3, rcon); \
187 expand_step256_1(&t1, &t2); \
189 expand_step256_2(&t1, &t3); \
197 t1
= _mm_loadu_si128((const void *)kb
);
199 KEXP128(t1
, 1, 0x01);
200 KEXP128(t1
, 2, 0x02);
201 KEXP128(t1
, 3, 0x04);
202 KEXP128(t1
, 4, 0x08);
203 KEXP128(t1
, 5, 0x10);
204 KEXP128(t1
, 6, 0x20);
205 KEXP128(t1
, 7, 0x40);
206 KEXP128(t1
, 8, 0x80);
207 KEXP128(t1
, 9, 0x1B);
208 KEXP128(t1
, 10, 0x36);
212 t1
= _mm_loadu_si128((const void *)kb
);
213 t3
= _mm_loadu_si128((const void *)(kb
+ 8));
214 t3
= _mm_shuffle_epi32(t3
, 0x4E);
215 KEXP192(0, 0x01, 0x02);
216 KEXP192(3, 0x04, 0x08);
217 KEXP192(6, 0x10, 0x20);
218 KEXP192(9, 0x40, 0x80);
223 t1
= _mm_loadu_si128((const void *)kb
);
224 t3
= _mm_loadu_si128((const void *)(kb
+ 16));
233 t2
= _mm_aeskeygenassist_si128(t3
, 0x40);
234 expand_step256_1(&t1
, &t2
);
248 BR_TARGET("sse2,aes")
250 br_aes_x86ni_keysched_enc(unsigned char *skni
, const void *key
, size_t len
)
255 num_rounds
= x86ni_keysched(sk
, key
, len
);
256 memcpy(skni
, sk
, (num_rounds
+ 1) << 4);
261 BR_TARGET("sse2,aes")
263 br_aes_x86ni_keysched_dec(unsigned char *skni
, const void *key
, size_t len
)
266 unsigned u
, num_rounds
;
268 num_rounds
= x86ni_keysched(sk
, key
, len
);
269 _mm_storeu_si128((void *)skni
, sk
[num_rounds
]);
270 for (u
= 1; u
< num_rounds
; u
++) {
271 _mm_storeu_si128((void *)(skni
+ (u
<< 4)),
272 _mm_aesimc_si128(sk
[num_rounds
- u
]));
274 _mm_storeu_si128((void *)(skni
+ (num_rounds
<< 4)), sk
[0]);