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[BearSSL] / src / symcipher / aes_x86ni.c
1 /*
2 * Copyright (c) 2017 Thomas Pornin <pornin@bolet.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sublicense, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25 #include "inner.h"
26
27 /*
28 * This code contains the AES key schedule implementation using the
29 * AES-NI opcodes.
30 */
31
32 #if BR_AES_X86NI
33
34 #if BR_AES_X86NI_GCC
35 #if BR_AES_X86NI_GCC_OLD
36 #pragma GCC push_options
37 #pragma GCC target("sse2,sse4.1,aes,pclmul")
38 #endif
39 #include <wmmintrin.h>
40 #include <cpuid.h>
41 #if BR_AES_X86NI_GCC_OLD
42 #pragma GCC pop_options
43 #endif
44 #endif
45
46 #if BR_AES_X86NI_MSC
47 #include <intrin.h>
48 #endif
49
50 /* see inner.h */
51 int
52 br_aes_x86ni_supported(void)
53 {
54 /*
55 * Bit mask for features in ECX:
56 * 19 SSE4.1 (used for _mm_insert_epi32(), for AES-CTR)
57 * 25 AES-NI
58 */
59 #define MASK 0x02080000
60
61 #if BR_AES_X86NI_GCC
62 unsigned eax, ebx, ecx, edx;
63
64 if (__get_cpuid(1, &eax, &ebx, &ecx, &edx)) {
65 return (ecx & MASK) == MASK;
66 } else {
67 return 0;
68 }
69 #elif BR_AES_X86NI_MSC
70 int info[4];
71
72 __cpuid(info, 1);
73 return ((uint32_t)info[2] & MASK) == MASK;
74 #else
75 return 0;
76 #endif
77
78 #undef MASK
79 }
80
81 /*
82 * Per-function attributes appear unreliable on old GCC, so we use the
83 * pragma for all remaining functions in this file.
84 */
85 #if BR_AES_X86NI_GCC_OLD
86 #pragma GCC target("sse2,sse4.1,aes,pclmul")
87 #endif
88
89 BR_TARGET("sse2,aes")
90 static inline __m128i
91 expand_step128(__m128i k, __m128i k2)
92 {
93 k = _mm_xor_si128(k, _mm_slli_si128(k, 4));
94 k = _mm_xor_si128(k, _mm_slli_si128(k, 4));
95 k = _mm_xor_si128(k, _mm_slli_si128(k, 4));
96 k2 = _mm_shuffle_epi32(k2, 0xFF);
97 return _mm_xor_si128(k, k2);
98 }
99
100 BR_TARGET("sse2,aes")
101 static inline void
102 expand_step192(__m128i *t1, __m128i *t2, __m128i *t3)
103 {
104 __m128i t4;
105
106 *t2 = _mm_shuffle_epi32(*t2, 0x55);
107 t4 = _mm_slli_si128(*t1, 0x4);
108 *t1 = _mm_xor_si128(*t1, t4);
109 t4 = _mm_slli_si128(t4, 0x4);
110 *t1 = _mm_xor_si128(*t1, t4);
111 t4 = _mm_slli_si128(t4, 0x4);
112 *t1 = _mm_xor_si128(*t1, t4);
113 *t1 = _mm_xor_si128(*t1, *t2);
114 *t2 = _mm_shuffle_epi32(*t1, 0xFF);
115 t4 = _mm_slli_si128(*t3, 0x4);
116 *t3 = _mm_xor_si128(*t3, t4);
117 *t3 = _mm_xor_si128(*t3, *t2);
118 }
119
120 BR_TARGET("sse2,aes")
121 static inline void
122 expand_step256_1(__m128i *t1, __m128i *t2)
123 {
124 __m128i t4;
125
126 *t2 = _mm_shuffle_epi32(*t2, 0xFF);
127 t4 = _mm_slli_si128(*t1, 0x4);
128 *t1 = _mm_xor_si128(*t1, t4);
129 t4 = _mm_slli_si128(t4, 0x4);
130 *t1 = _mm_xor_si128(*t1, t4);
131 t4 = _mm_slli_si128(t4, 0x4);
132 *t1 = _mm_xor_si128(*t1, t4);
133 *t1 = _mm_xor_si128(*t1, *t2);
134 }
135
136 BR_TARGET("sse2,aes")
137 static inline void
138 expand_step256_2(__m128i *t1, __m128i *t3)
139 {
140 __m128i t2, t4;
141
142 t4 = _mm_aeskeygenassist_si128(*t1, 0x0);
143 t2 = _mm_shuffle_epi32(t4, 0xAA);
144 t4 = _mm_slli_si128(*t3, 0x4);
145 *t3 = _mm_xor_si128(*t3, t4);
146 t4 = _mm_slli_si128(t4, 0x4);
147 *t3 = _mm_xor_si128(*t3, t4);
148 t4 = _mm_slli_si128(t4, 0x4);
149 *t3 = _mm_xor_si128(*t3, t4);
150 *t3 = _mm_xor_si128(*t3, t2);
151 }
152
153 /*
154 * Perform key schedule for AES, encryption direction. Subkeys are written
155 * in sk[], and the number of rounds is returned. Key length MUST be 16,
156 * 24 or 32 bytes.
157 */
158 BR_TARGET("sse2,aes")
159 static unsigned
160 x86ni_keysched(__m128i *sk, const void *key, size_t len)
161 {
162 const unsigned char *kb;
163
164 #define KEXP128(k, i, rcon) do { \
165 k = expand_step128(k, _mm_aeskeygenassist_si128(k, rcon)); \
166 sk[i] = k; \
167 } while (0)
168
169 #define KEXP192(i, rcon1, rcon2) do { \
170 sk[(i) + 0] = t1; \
171 sk[(i) + 1] = t3; \
172 t2 = _mm_aeskeygenassist_si128(t3, rcon1); \
173 expand_step192(&t1, &t2, &t3); \
174 sk[(i) + 1] = _mm_castpd_si128(_mm_shuffle_pd( \
175 _mm_castsi128_pd(sk[(i) + 1]), \
176 _mm_castsi128_pd(t1), 0)); \
177 sk[(i) + 2] = _mm_castpd_si128(_mm_shuffle_pd( \
178 _mm_castsi128_pd(t1), \
179 _mm_castsi128_pd(t3), 1)); \
180 t2 = _mm_aeskeygenassist_si128(t3, rcon2); \
181 expand_step192(&t1, &t2, &t3); \
182 } while (0)
183
184 #define KEXP256(i, rcon) do { \
185 sk[(i) + 0] = t3; \
186 t2 = _mm_aeskeygenassist_si128(t3, rcon); \
187 expand_step256_1(&t1, &t2); \
188 sk[(i) + 1] = t1; \
189 expand_step256_2(&t1, &t3); \
190 } while (0)
191
192 kb = key;
193 switch (len) {
194 __m128i t1, t2, t3;
195
196 case 16:
197 t1 = _mm_loadu_si128((const void *)kb);
198 sk[0] = t1;
199 KEXP128(t1, 1, 0x01);
200 KEXP128(t1, 2, 0x02);
201 KEXP128(t1, 3, 0x04);
202 KEXP128(t1, 4, 0x08);
203 KEXP128(t1, 5, 0x10);
204 KEXP128(t1, 6, 0x20);
205 KEXP128(t1, 7, 0x40);
206 KEXP128(t1, 8, 0x80);
207 KEXP128(t1, 9, 0x1B);
208 KEXP128(t1, 10, 0x36);
209 return 10;
210
211 case 24:
212 t1 = _mm_loadu_si128((const void *)kb);
213 t3 = _mm_loadu_si128((const void *)(kb + 8));
214 t3 = _mm_shuffle_epi32(t3, 0x4E);
215 KEXP192(0, 0x01, 0x02);
216 KEXP192(3, 0x04, 0x08);
217 KEXP192(6, 0x10, 0x20);
218 KEXP192(9, 0x40, 0x80);
219 sk[12] = t1;
220 return 12;
221
222 case 32:
223 t1 = _mm_loadu_si128((const void *)kb);
224 t3 = _mm_loadu_si128((const void *)(kb + 16));
225 sk[0] = t1;
226 KEXP256( 1, 0x01);
227 KEXP256( 3, 0x02);
228 KEXP256( 5, 0x04);
229 KEXP256( 7, 0x08);
230 KEXP256( 9, 0x10);
231 KEXP256(11, 0x20);
232 sk[13] = t3;
233 t2 = _mm_aeskeygenassist_si128(t3, 0x40);
234 expand_step256_1(&t1, &t2);
235 sk[14] = t1;
236 return 14;
237
238 default:
239 return 0;
240 }
241
242 #undef KEXP128
243 #undef KEXP192
244 #undef KEXP256
245 }
246
247 /* see inner.h */
248 BR_TARGET("sse2,aes")
249 unsigned
250 br_aes_x86ni_keysched_enc(unsigned char *skni, const void *key, size_t len)
251 {
252 __m128i sk[15];
253 unsigned num_rounds;
254
255 num_rounds = x86ni_keysched(sk, key, len);
256 memcpy(skni, sk, (num_rounds + 1) << 4);
257 return num_rounds;
258 }
259
260 /* see inner.h */
261 BR_TARGET("sse2,aes")
262 unsigned
263 br_aes_x86ni_keysched_dec(unsigned char *skni, const void *key, size_t len)
264 {
265 __m128i sk[15];
266 unsigned u, num_rounds;
267
268 num_rounds = x86ni_keysched(sk, key, len);
269 _mm_storeu_si128((void *)skni, sk[num_rounds]);
270 for (u = 1; u < num_rounds; u ++) {
271 _mm_storeu_si128((void *)(skni + (u << 4)),
272 _mm_aesimc_si128(sk[num_rounds - u]));
273 }
274 _mm_storeu_si128((void *)(skni + (num_rounds << 4)), sk[0]);
275 return num_rounds;
276 }
277
278 #endif
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