_ Git - BearSSL/blob - config.h

   1 /*
   2  * Copyright (c) 2016 Thomas Pornin <pornin@bolet.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining
   5  * a copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sublicense, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  */
  24
  25 #ifndef CONFIG_H__
  26 #define CONFIG_H__
  27
  28 /*
  29  * This file contains compile-time flags that can override the
  30  * autodetection performed in relevant files. Each flag is a macro; it
  31  * deactivates the feature if defined to 0, activates it if defined to a
  32  * non-zero integer (normally 1). If the macro is not defined, then
  33  * autodetection applies.
  34  */
  35
  36 /*
  37  * When BR_64 is enabled, 64-bit integer types are assumed to be
  38  * efficient (i.e. the architecture has 64-bit registers and can
  39  * do 64-bit operations as fast as 32-bit operations).
  40  *
  41 #define BR_64   1
  42  */
  43
  44 /*
  45  * When BR_LOMUL is enabled, then multiplications of 32-bit values whose
  46  * result are truncated to the low 32 bits are assumed to be
  47  * substantially more efficient than 32-bit multiplications that yield
  48  * 64-bit results. This is typically the case on low-end ARM Cortex M
  49  * systems (M0, M0+, M1, and arguably M3 and M4 as well).
  50  *
  51 #define BR_LOMUL   1
  52  */
  53
  54 /*
  55  * When BR_SLOW_MUL is enabled, multiplications are assumed to be
  56  * substantially slow with regards to other integer operations, thus
  57  * making it worth to make more operations for a given task if it allows
  58  * using less multiplications.
  59  *
  60 #define BR_SLOW_MUL   1
  61  */
  62
  63 /*
  64  * When BR_SLOW_MUL15 is enabled, short multplications (on 15-bit words)
  65  * are assumed to be substantially slow with regards to other integer
  66  * operations, thus making it worth to make more integer operations if
  67  * it allows using less multiplications.
  68  *
  69 #define BR_SLOW_MUL15   1
  70  */
  71
  72 /*
  73  * When BR_CT_MUL31 is enabled, multiplications of 31-bit values (used
  74  * in the "i31" big integer implementation) use an alternate implementation
  75  * which is slower and larger than the normal multiplication, but should
  76  * ensure constant-time multiplications even on architectures where the
  77  * multiplication opcode takes a variable number of cycles to complete.
  78  *
  79 #define BR_CT_MUL31   1
  80  */
  81
  82 /*
  83  * When BR_CT_MUL15 is enabled, multiplications of 15-bit values (held
  84  * in 32-bit words) use an alternate implementation which is slower and
  85  * larger than the normal multiplication, but should ensure
  86  * constant-time multiplications on most/all architectures where the
  87  * basic multiplication is not constant-time.
  88 #define BR_CT_MUL15   1
  89  */
  90
  91 /*
  92  * When BR_NO_ARITH_SHIFT is enabled, arithmetic right shifts (with sign
  93  * extension) are performed with a sequence of operations which is bigger
  94  * and slower than a simple right shift on a signed value. This avoids
  95  * relying on an implementation-defined behaviour. However, most if not
  96  * all C compilers use sign extension for right shifts on signed values,
  97  * so this alternate macro is disabled by default.
  98 #define BR_NO_ARITH_SHIFT   1
  99  */
 100
 101 /*
 102  * When BR_USE_URANDOM is enabled, the SSL engine will use /dev/urandom
 103  * to automatically obtain quality randomness for seedings its internal
 104  * PRNG.
 105  *
 106 #define BR_USE_URANDOM   1
 107  */
 108
 109 /*
 110  * When BR_USE_WIN32_RAND is enabled, the SSL engine will use the Win32
 111  * (CryptoAPI) functions (CryptAcquireContext(), CryptGenRandom()...) to
 112  * automatically obtain quality randomness for seedings its internal PRNG.
 113  *
 114  * Note: if both BR_USE_URANDOM and BR_USE_WIN32_RAND are defined, the
 115  * former takes precedence.
 116  *
 117 #define BR_USE_WIN32_RAND   1
 118  */
 119
 120 /*
 121  * When BR_USE_UNIX_TIME is enabled, the X.509 validation engine obtains
 122  * the current time from the OS by calling time(), and assuming that the
 123  * returned value (a 'time_t') is an integer that counts time in seconds
 124  * since the Unix Epoch (Jan 1st, 1970, 00:00 UTC).
 125  *
 126 #define BR_USE_UNIX_TIME   1
 127  */
 128
 129 /*
 130  * When BR_USE_WIN32_TIME is enabled, the X.509 validation engine obtains
 131  * the current time from the OS by calling the Win32 function
 132  * GetSystemTimeAsFileTime().
 133  *
 134  * Note: if both BR_USE_UNIX_TIME and BR_USE_WIN32_TIME are defined, the
 135  * former takes precedence.
 136  *
 137 #define BR_USE_WIN32_TIME   1
 138  */
 139
 140 /*
 141  * When BR_ARMEL_CORTEXM_GCC is enabled, some operations are replaced with
 142  * inline assembly which is shorter and/or faster. This should be used
 143  * only when all of the following are true:
 144  *   - target architecture is ARM in Thumb mode
 145  *   - target endianness is little-endian
 146  *   - compiler is GCC (or GCC-compatible for inline assembly syntax)
 147  *
 148  * This is meant for the low-end cores (Cortex M0, M0+, M1, M3).
 149  * Note: if BR_LOMUL is not explicitly enabled or disabled, then
 150  * enabling BR_ARMEL_CORTEXM_GCC also enables BR_LOMUL.
 151  *
 152 #define BR_ARMEL_CORTEXM_GCC   1
 153  */
 154
 155 /*
 156  * When BR_AES_X86NI is enabled, the AES implementation using the x86 "NI"
 157  * instructions (dedicated AES opcodes) will be compiled. If this is not
 158  * enabled explicitly, then that AES implementation will be compiled only
 159  * if a compatible compiler is detected. If set explicitly to 0, the
 160  * implementation will not be compiled at all.
 161  *
 162 #define BR_AES_X86NI   1
 163  */
 164
 165 /*
 166  * When BR_POWER8 is enabled, the AES implementation using the POWER ISA
 167  * 2.07 opcodes (available on POWER8 processors and later) is compiled.
 168  * If this is not enabled explicitly, then that implementation will be
 169  * compiled only if a compatible compiler is detected, _and_ the target
 170  * architecture is POWER8 or later.
 171  *
 172 #define BR_POWER8   1
 173  */
 174
 175 /*
 176  * When BR_INT128 is enabled, then code using the 'unsigned __int64'
 177  * and 'unsigned __int128' types will be used to leverage 64x64->128
 178  * unsigned multiplications. This should work with GCC and compatible
 179  * compilers on 64-bit architectures.
 180  *
 181 #define BR_INT128   1
 182  */
 183
 184 /*
 185  * When BR_UMUL128 is enabled, then code using the '_umul128()' and
 186  * '_addcarry_u64()' intrinsics will be used to implement 64x64->128
 187  * unsigned multiplications. This should work on Visual C on x64 systems.
 188  *
 189 #define BR_UMUL128   1
 190  */
 191
 192 /*
 193  * When BR_LE_UNALIGNED is enabled, then the current architecture is
 194  * assumed to use little-endian encoding for integers, and to tolerate
 195  * unaligned accesses with no or minimal time penalty.
 196  *
 197 #define BR_LE_UNALIGNED   1
 198  */
 199
 200 /*
 201  * When BR_BE_UNALIGNED is enabled, then the current architecture is
 202  * assumed to use little-endian encoding for integers, and to tolerate
 203  * unaligned accesses with no or minimal time penalty.
 204  *
 205 #define BR_BE_UNALIGNED   1
 206  */
 207
 208 #endif